Two-way radios capable of sourcing and receiving encrypted messages are known in the art. Typically, such radios operate by encrypting an original sourced information signal as a function of at least one cipher key. Generally, this requires initial digitization of the original message (if the original message was analog, such as a voice message). The digitized version of the original message can then be enciphored in an appropriate manner as a function of the cipher key.
In a number of known radios, the enciphored digitized message is processed at a 12 kbs clock rate.
For certain applications, it would be desirable to provide an encryption capable radio with multiple cipher keys. So configured, the radio would be equipped to encrypt, or decrypt, messages in accordance with more than one key as appropriate to a particular communication. In order to accommodate such a configuration, however, the encryption mechanism must be loaded with the key of choice. The loading of such a key will ordinarily be managed by an associated processor in the radio. The encryption mechanism will need to receive and process the loading of the key at its ordinary encryption/decryption clock rate; for instance, 12 kbs. For many processors, however, accommodating the encryption mechanism in this regard may lead to real time problems, as this clock rate may be incompatible with its other tasks and requirements. Although a more powerful processor could be utilized, provision of such an enhanced microprocessor represents increased cost and potentially increased complexity.
There exists a need for a methodology for allowing an encryption device to be loaded with a new key while simultaneously imposing minimum requirements on an associated processor that manages loading of the key.